Colloquial term for a class of diamondoid-based processing devices used as the fundamental unit for constructing Second Singularity mind cores as well as various other applications.
A basic processor consists of a diamondoid block measuring 1cm x 1cm x 1mm in size and massing approximately 0.352 grams. A UC typically operates at a baseline comfortable temperature of 300 degrees Kelvin with an input power of approximately 100 watts. Ultimate chips use phonon (quantized vibration packets) based computation and data transmission methods which are much more efficient than photon based designs at temperatures below ~1000 degrees Kelvin in a diamondoid substrate.
A single Ultimate Chip is capable of processing some 5.09911 E21 bits per second and storing approximately 4.88 E20 bits within its structure. When linked to other processing units or external transmission devices designed to operate in the phonon regime it is capable of transmitting information at bandwidth rates of 8.77 E23 bits per second.
Ultimate chips were originally invented by the first Second Singularity (S2) intelligences as part of the effort to move their minds into more efficient substrates. Seeking to move from the massive networks of linked nanocomputers that initially housed them at the time of their transcension beyond the First Singularity, the early S2 developed processors that seemed to push computation to the very limits of conventional matter. By linking vast numbers of such chips together they were able to create processing substrates that, while still quite large in comparison to the brains of First Singularity minds, were only a fraction of the size of the original processors the S2 began on.
In the modern era Ultimate Chips continue to form the basis for Second Singularity minds as well as many of their technologies. They also provide the foundation for the computation and communication networks of a number of civilizations. Even those cultures with access to Third, Fourth, or even higher singularity level technologies will often use 'Ultimate' chips to operate their lower level communication and processing nodes.